Before integrated circuits were highly integrated, isolation was sufficiently obtained by junction isolation technology in bipolar devices, while a more perfect isolation was obtained between adjacent oxide films in metal oxide silicon (MOS) devices by a protection oxide film. However, the more recent trend of semiconductor devices toward higher integration creates the need for a minimization of isolation regions.
Until now, the local oxidation of silicon (LOCOS) method has been chiefly utilized for device isolation. However, in creating isolation regions with design dimensions now being in units of sub-microns, the LOCOS method has several problems. One problem is a field oxide film thinning effect caused at the time of forming the structure of the isolation regions. It is known that the field oxide thinning effect is due to the fact that field oxide film grows much more in wide isolation regions than in narrow isolation regions (see, for example, "Silicon Processing for the VLSI ERA" Vol 2 California, Lattice Press, 1990, p. 26 by S. Wolf).
FIG. 1 is a cross-sectional view for explaining the field oxide film thinning effect appearing in the conventional LOCOS-series isolation method. Field oxide films 3 and 4 are formed respectively in narrow and wide isolation regions 5 and 6, which are defined by partly etching a nitride film 2 on a semiconductor substrate 1. The narrow isolation region 5 has a width of W.sub.1 while the wide isolation region 6 has a width of W.sub.2. The field oxide film 3 in the narrow isolation region 5 has a thickness of L.sub.1, while the field oxide film 4 in the wide isolation region 6 has a thickness of L.sub.2. As is conventionally known, if the width W.sub.1 of the narrow isolation region 5 is smaller than the width W.sub.2 of the wide isolation region 6, the thickness L.sub.1 of the field oxide film 3 in the narrow isolation region 5 becomes thinner than the thickness L.sub.2 of the field oxide film 4 in the wide isolation region 6. Accordingly, the smaller the width of the isolation region, the smaller the formed thickness of the field oxide film. Therefore, a difference in the thickness of the field oxide film is generated in isolation regions of different width. This difference in thickness becomes very severe when the width of the isolation region is sub-micron sized. For example, in the conventional method of the above reference, the field oxide film in a wide (1.5 .mu.m) isolation region grows to about the thickness of 400 nm, while the field oxide film in a narrow (0.8 .mu.m) isolation region grows only to the thickness of about 290 nm.
It is known that the field oxide film thinning effect is caused by the difference in the amount of oxidants available in the wide isolation region 6 compared with those available in the narrow isolation region 5.
The field oxide film thinning effect causes various problems. Before the formation of a gate electrode, a wet etching removes the same amount of field oxide film from the wide isolation region 6 as is removed from the narrow isolation region 5. Accordingly, an insufficient amount of the field oxide film remains in the narrow isolation region 5. Furthermore, because of the field oxide film 3 in the narrow isolation region 5 is thinner, source/drain ions are injected more closely to the underlying layers, generating a problem of punchthrough. Moreover, a stringer problem is caused by the field oxide film which is left below the sharp step of the field oxide resulting from an etch-back process, which causes a post gate poly-silicon etch to be insufficient, thereby leaving unetched field oxide film remnants connected to each other. Furthermore, since the thickness L.sub.1 of the field oxide film 3 in the narrow isolation region 5 becomes thin, the capacitance between the gate polysilicon and the underlying silicon is increased, which decreases the speed of the semiconductor device. There is also the problem that the resulting positions of ions implanted during a field ion implantation cannot be made identical to each other in the field oxide film between isolation regions of differing widths, and it is also difficult to adjust a threshold voltage of the device.